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Update to support ESP-IDF v5 in develop branch (#186)

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* Update to support ESP-IDF v5 in develop branch

* Remove the need for rom includes while providing IDF v5 compatibility

* Fix missing '(' typo

* Remove unnecessarily addded rom header files

* Add missing version include

* Fix another forgotten ')'
This commit is contained in:
Rashed Talukder 2022-05-12 20:15:06 -07:00 • committed by GitHub
parent bd8a7e3edd
commit 8d9f6e2548
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GPG key ID: 4AEE18F83AFDEB23
15 changed files with 77 additions and 47 deletions
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5
lvgl_tft/FT81x.c
View file

@ -2,6 +2,7 @@
#include <stdio.h>
#include "driver/gpio.h"
#include "esp_idf_version.h"
#include "FT81x.h"
@ -263,7 +264,11 @@ void TFT_bitmap_display(void)
void FT81x_init(void)
{
#if EVE_USE_PDN
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
esp_rom_gpio_pad_select_gpio(EVE_PDN);
#else
gpio_pad_select_gpio(EVE_PDN);
#endif
#endif
gpio_set_level(EVE_CS, 1);

6
lvgl_tft/GC9A01.c
View file

@ -121,7 +121,7 @@ void GC9A01_init(void)
GC9A01_send_cmd(GC_init_cmds[cmd].cmd);
GC9A01_send_data(GC_init_cmds[cmd].data, GC_init_cmds[cmd].databytes&0x1F);
if (GC_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
}
cmd++;
}
@ -235,8 +235,8 @@ static void GC9A01_reset(void)
#if GC9A01_USE_RST
//Reset the display
gpio_set_level(GC9A01_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(GC9A01_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
#endif
}

6
lvgl_tft/hx8357.c
View file

@ -176,7 +176,7 @@ void hx8357_init(void)
}
}
if (x & 0x80) { // If high bit set...
vTaskDelay(numArgs * 5 / portTICK_RATE_MS); // numArgs is actually a delay time (5ms units)
vTaskDelay(numArgs * pdMS_TO_TICKS(5)); // numArgs is actually a delay time (5ms units)
}
}
@ -278,8 +278,8 @@ static void hx8357_reset(void)
{
#if HX8357_USE_RST
gpio_set_level(HX8357_RST, 0);
vTaskDelay(10 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(10));
gpio_set_level(HX8357_RST, 1);
vTaskDelay(120 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(120));
#endif
}

8
lvgl_tft/il3820.c
View file

@ -249,14 +249,14 @@ static void il3820_waitbusy(int wait_ms)
{
int i = 0;
vTaskDelay(10 / portTICK_RATE_MS); // 10ms delay
vTaskDelay(pdMS_TO_TICKS(10)); // 10ms delay
for(i = 0; i < (wait_ms * 10); i++) {
if(gpio_get_level(IL3820_BUSY_PIN) != IL3820_BUSY_LEVEL) {
return;
}
vTaskDelay(10 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(10));
}
LV_LOG_ERROR("Busy exceeded %dms", i*10 );
@ -404,9 +404,9 @@ static void il3820_reset(void)
#if IL3820_USE_RST
/* Harware reset */
gpio_set_level( IL3820_RST_PIN, 0);
vTaskDelay(IL3820_RESET_DELAY / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(IL3820_RESET_DELAY));
gpio_set_level( IL3820_RST_PIN, 1);
vTaskDelay(IL3820_RESET_DELAY / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(IL3820_RESET_DELAY));
#endif
/* Software reset */

6
lvgl_tft/ili9163c.c
View file

@ -144,7 +144,7 @@ void ili9163c_init(void)
ili9163c_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes & 0x1F);
if (ili_init_cmds[cmd].databytes & 0x80)
{
vTaskDelay(150 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(150));
}
cmd++;
}
@ -239,9 +239,9 @@ static void ili9163c_reset(void)
{
#if CONFIG_LV_DISP_USE_RST
gpio_set_level(ILI9163C_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ILI9163C_RST, 1);
vTaskDelay(150 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(150));
#else
#endif
}

8
lvgl_tft/ili9481.c
View file

@ -81,7 +81,7 @@ void ili9481_init(void)
ili9481_send_cmd(ili_init_cmds[cmd].cmd);
ili9481_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
}
cmd++;
}
@ -195,12 +195,12 @@ static void ili9481_reset(void)
{
#if ILI9481_USE_RST
gpio_set_level(ILI9481_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ILI9481_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
#else
// Exit sleep, software reset
ili9481_send_cmd(0x01);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
#endif
}

6
lvgl_tft/ili9486.c
View file

@ -73,7 +73,7 @@ void ili9486_init(void)
ili9486_send_cmd(ili_init_cmds[cmd].cmd);
ili9486_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
}
cmd++;
}
@ -169,8 +169,8 @@ static void ili9486_reset(void)
{
#if ILI9486_USE_RST
gpio_set_level(ILI9486_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ILI9486_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
#endif
}

12
lvgl_tft/ra8875.c
View file

@ -284,21 +284,21 @@ void ra8875_sleep_in(void)
ra8875_configure_clocks(false);
ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS));
vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
ra8875_write_cmd(RA8875_REG_PWRR, 0x02); // Power and Display Control Register (PWRR)
}
void ra8875_sleep_out(void)
{
ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS));
vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
ra8875_configure_clocks(true);
disp_spi_change_device_speed(-1);
ra8875_write_cmd(RA8875_REG_PWRR, 0x80); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS));
vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
}
uint8_t ra8875_read_cmd(uint8_t cmd)
@ -331,7 +331,7 @@ void ra8875_configure_clocks(bool high_speed)
vTaskDelay(1);
ra8875_write_cmd(RA8875_REG_PCSR, PCSR_VAL); // Pixel Clock Setting Register (PCSR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS));
vTaskDelay(DIV_ROUND_UP(20, portTICK_PERIOD_MS));
}
static void ra8875_set_window(unsigned int xs, unsigned int xe, unsigned int ys, unsigned int ye)
@ -370,8 +370,8 @@ static void ra8875_reset(void)
{
#if RA8875_USE_RST
gpio_set_level(RA8875_RST, 0);
vTaskDelay(DIV_ROUND_UP(100, portTICK_RATE_MS));
vTaskDelay(DIV_ROUND_UP(100, portTICK_PERIOD_MS));
gpio_set_level(RA8875_RST, 1);
vTaskDelay(DIV_ROUND_UP(100, portTICK_RATE_MS));
vTaskDelay(DIV_ROUND_UP(100, portTICK_PERIOD_MS));
#endif
}

6
lvgl_tft/sh1107.c
View file

@ -102,7 +102,7 @@ void sh1107_init(void)
sh1107_send_cmd(init_cmds[cmd].cmd);
sh1107_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F);
if (init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
}
cmd++;
}
@ -250,8 +250,8 @@ static void sh1107_reset(void)
{
#if SH1107_USE_RST
gpio_set_level(SH1107_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(SH1107_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
#endif
}

6
lvgl_tft/st7735s.c
View file

@ -109,7 +109,7 @@ void st7735s_init(void)
st7735s_send_cmd(init_cmds[cmd].cmd);
st7735s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F);
if (init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
}
cmd++;
}
@ -219,9 +219,9 @@ static void st7735s_reset(void)
{
#if ST7735S_USE_RST
gpio_set_level(ST7735S_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ST7735S_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
#endif
}

6
lvgl_tft/st7796s.c
View file

@ -92,7 +92,7 @@ void st7796s_init(void)
st7796s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes & 0x1F);
if (init_cmds[cmd].databytes & 0x80)
{
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
}
cmd++;
}
@ -203,8 +203,8 @@ static void st7796s_reset(void)
{
#if ST7796S_USE_RST
gpio_set_level(ST7796S_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
gpio_set_level(ST7796S_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS);
vTaskDelay(pdMS_TO_TICKS(100));
#endif
}