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Fix ILI9488 init function | Fix little ILI9488 display artifacts | auto-dma by default for all esp devices | ESP32-S3 support added | updated to be compatible with esp-idf =< 4 and >= 5 versions

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This commit is contained in:
Vitor Alho 2023-09-05 11:24:38 -03:00
parent 26fe6e7703
commit 0b55ade07e
23 changed files with 160 additions and 87 deletions
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16
CMakeLists.txt
View file

@ -84,12 +84,22 @@ if(CONFIG_LV_I2C)
list(APPEND SOURCES "lvgl_i2c/i2c_manager.c") list(APPEND SOURCES "lvgl_i2c/i2c_manager.c")
endif() endif()
idf_component_register(SRCS ${SOURCES} idf_component_register( SRCS ${SOURCES}
INCLUDE_DIRS ${LVGL_INCLUDE_DIRS} INCLUDE_DIRS ${LVGL_INCLUDE_DIRS}
REQUIRES lvgl) if(ESP_IDF_VERSION_MAJOR>=5)
REQUIRES lvgl driver
else
REQUIRES lvgl
endif)
target_compile_definitions(${COMPONENT_LIB} PUBLIC "-DLV_LVGL_H_INCLUDE_SIMPLE") target_compile_definitions(${COMPONENT_LIB} PUBLIC "-DLV_LVGL_H_INCLUDE_SIMPLE")
if(ESP_IDF_VERSION_MAJOR >= 5)
target_compile_definitions(${COMPONENT_LIB} PUBLIC "-USE_PORT_TICK_PERIOD_MS")
else()
target_compile_definitions(${COMPONENT_LIB} PUBLIC "-USE_PORT_TICK_RATE_MS")
endif()
else() else()
message(FATAL_ERROR "LVGL ESP32 drivers: ESP_PLATFORM is not defined. Try reinstalling ESP-IDF.") message(FATAL_ERROR "LVGL ESP32 drivers: ESP_PLATFORM is not defined. Try reinstalling ESP-IDF.")
endif() endif()

14
lvgl_helpers.c
View file

@ -65,7 +65,7 @@ void lvgl_driver_init(void)
lvgl_spi_driver_init(TFT_SPI_HOST, lvgl_spi_driver_init(TFT_SPI_HOST,
DISP_SPI_MISO, DISP_SPI_MOSI, DISP_SPI_CLK, DISP_SPI_MISO, DISP_SPI_MOSI, DISP_SPI_CLK,
SPI_BUS_MAX_TRANSFER_SZ, 1, SPI_BUS_MAX_TRANSFER_SZ, SPI_DMA_CH_AUTO,
DISP_SPI_IO2, DISP_SPI_IO3); DISP_SPI_IO2, DISP_SPI_IO3);
disp_spi_add_device(TFT_SPI_HOST); disp_spi_add_device(TFT_SPI_HOST);
@ -83,7 +83,7 @@ void lvgl_driver_init(void)
lvgl_spi_driver_init(TFT_SPI_HOST, lvgl_spi_driver_init(TFT_SPI_HOST,
TP_SPI_MISO, DISP_SPI_MOSI, DISP_SPI_CLK, TP_SPI_MISO, DISP_SPI_MOSI, DISP_SPI_CLK,
SPI_BUS_MAX_TRANSFER_SZ, 1, SPI_BUS_MAX_TRANSFER_SZ, SPI_DMA_CH_AUTO,
-1, -1); -1, -1);
disp_spi_add_device(TFT_SPI_HOST); disp_spi_add_device(TFT_SPI_HOST);
@ -101,7 +101,7 @@ void lvgl_driver_init(void)
lvgl_spi_driver_init(TFT_SPI_HOST, lvgl_spi_driver_init(TFT_SPI_HOST,
DISP_SPI_MISO, DISP_SPI_MOSI, DISP_SPI_CLK, DISP_SPI_MISO, DISP_SPI_MOSI, DISP_SPI_CLK,
SPI_BUS_MAX_TRANSFER_SZ, 1, SPI_BUS_MAX_TRANSFER_SZ, SPI_DMA_CH_AUTO,
DISP_SPI_IO2, DISP_SPI_IO3); DISP_SPI_IO2, DISP_SPI_IO3);
disp_spi_add_device(TFT_SPI_HOST); disp_spi_add_device(TFT_SPI_HOST);
@ -120,7 +120,7 @@ void lvgl_driver_init(void)
lvgl_spi_driver_init(TOUCH_SPI_HOST, lvgl_spi_driver_init(TOUCH_SPI_HOST,
TP_SPI_MISO, TP_SPI_MOSI, TP_SPI_CLK, TP_SPI_MISO, TP_SPI_MOSI, TP_SPI_CLK,
0 /* Defaults to 4094 */, 2, 0 /* Defaults to 4094 */, SPI_DMA_CH_AUTO,
-1, -1); -1, -1);
tp_spi_add_device(TOUCH_SPI_HOST); tp_spi_add_device(TOUCH_SPI_HOST);
@ -175,10 +175,8 @@ bool lvgl_spi_driver_init(int host,
}; };
ESP_LOGI(TAG, "Initializing SPI bus..."); ESP_LOGI(TAG, "Initializing SPI bus...");
#if defined (CONFIG_IDF_TARGET_ESP32C3)
dma_channel = SPI_DMA_CH_AUTO; esp_err_t ret = spi_bus_initialize(host, &buscfg, SPI_DMA_CH_AUTO);
#endif
esp_err_t ret = spi_bus_initialize(host, &buscfg, (spi_dma_chan_t)dma_channel);
assert(ret == ESP_OK); assert(ret == ESP_OK);
return ESP_OK != ret; return ESP_OK != ret;

54
lvgl_helpers.h
View file

@ -22,6 +22,28 @@ extern "C" {
/********************* /*********************
* DEFINES * DEFINES
*********************/ *********************/
// Backwards compability with existing projects
#ifndef LV_HOR_RES_MAX
# ifdef CONFIG_LV_HOR_RES_MAX
# define LV_HOR_RES_MAX CONFIG_LV_HOR_RES_MAX
# else
# define LV_HOR_RES_MAX (480)
# endif
#endif
#ifndef LV_VER_RES_MAX
# ifdef CONFIG_LV_VER_RES_MAX
# define LV_VER_RES_MAX CONFIG_LV_VER_RES_MAX
# else
# define LV_VER_RES_MAX (320)
# endif
#endif
#ifdef USE_PORT_TICK_PERIOD_MS
#define portTICK_DELAY_MS portTICK_PERIOD_MS
#else
#ifdef USE_PORT_TICK_RATE_MS
#define portTICK_DELAY_MS portTICK_RATE_MS
#endif
/* DISP_BUF_SIZE value doesn't have an special meaning, but it's the size /* DISP_BUF_SIZE value doesn't have an special meaning, but it's the size
* of the buffer(s) passed to LVGL as display buffers. The default values used * of the buffer(s) passed to LVGL as display buffers. The default values used
@ -34,31 +56,39 @@ extern "C" {
* color format being used, for RGB565 each pixel needs 2 bytes. * color format being used, for RGB565 each pixel needs 2 bytes.
* When using the mono theme, the display pixels can be represented in one bit, * When using the mono theme, the display pixels can be represented in one bit,
* so the buffer size can be divided by 8, e.g. see SSD1306 display size. */ * so the buffer size can be divided by 8, e.g. see SSD1306 display size. */
#define TFT_DISPLAY_BUFFER_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION * 3 * 8)
#define TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION (TFT_DISPLAY_BUFFER_SIZE>SPI_LL_DMA_MAX_BIT_LEN)? SPI_LL_DMA_MAX_BIT_LEN-1000 :
#include "spi_master.h"
#if defined (CONFIG_CUSTOM_DISPLAY_BUFFER_SIZE) #if defined (CONFIG_CUSTOM_DISPLAY_BUFFER_SIZE)
#define DISP_BUF_SIZE CONFIG_CUSTOM_DISPLAY_BUFFER_BYTES #define DISP_BUF_SIZE CONFIG_CUSTOM_DISPLAY_BUFFER_BYTES
#else #else
#if defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_ST7789) #if defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_ST7789)
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ST7735S #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ST7735S
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ST7796S #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ST7796S
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_HX8357 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_HX8357
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_SH1107 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_SH1107
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * LV_VER_RES_MAX) #define DISP_BUF_SIZE (LV_HOR_RES_MAX * LV_VER_RES_MAX)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9481 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9481
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9486 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9486
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9488 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9488
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9341 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9341
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_SSD1306 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_SSD1306
#if defined (CONFIG_LV_THEME_MONO) #if defined (CONFIG_LV_THEME_MONO)
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * (LV_VER_RES_MAX / 8)) #define TFT_DISPLAY_MONO_BUFFER_SIZE (LV_HOR_RES_MAX * (LV_VER_RES_MAX / 8))
#define TFT_DISPLAY_MONO_BUFFER_SIZE_OVERFLOW_PROTECTION (TFT_DISPLAY_MONO_BUFFER_SIZE>SPI_LL_DMA_MAX_BIT_LEN)? SPI_LL_DMA_MAX_BIT_LEN-1000 :
#define DISP_BUF_SIZE (TFT_DISPLAY_MONO_BUFFER_SIZE_OVERFLOW_PROTECTION)
#else #else
#define TFT_DISPLAY_MONO_BUFFER_SIZE (LV_HOR_RES_MAX * LV_VER_RES_MAX)
#define TFT_DISPLAY_MONO_BUFFER_SIZE_OVERFLOW_PROTECTION (TFT_DISPLAY_MONO_BUFFER_SIZE>SPI_LL_DMA_MAX_BIT_LEN)? SPI_LL_DMA_MAX_BIT_LEN-1000 :
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * LV_VER_RES_MAX) #define DISP_BUF_SIZE (LV_HOR_RES_MAX * LV_VER_RES_MAX)
#endif #endif
#elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_FT81X) #elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_FT81X)
@ -67,15 +97,15 @@ extern "C" {
#elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_IL3820) #elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_IL3820)
#define DISP_BUF_SIZE (LV_VER_RES_MAX * IL3820_COLUMNS) #define DISP_BUF_SIZE (LV_VER_RES_MAX * IL3820_COLUMNS)
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_RA8875 #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_RA8875
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_GC9A01) #elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_GC9A01)
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_JD79653A) #elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_JD79653A)
#define DISP_BUF_SIZE ((LV_VER_RES_MAX * LV_VER_RES_MAX) / 8) // 5KB #define DISP_BUF_SIZE ((LV_VER_RES_MAX * LV_VER_RES_MAX) / 8) // 5KB
#elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_UC8151D) #elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_UC8151D)
#define DISP_BUF_SIZE ((LV_VER_RES_MAX * LV_VER_RES_MAX) / 8) // 2888 bytes #define DISP_BUF_SIZE ((LV_VER_RES_MAX * LV_VER_RES_MAX) / 8) // 2888 bytes
#elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9163C #elif defined CONFIG_LV_TFT_DISPLAY_CONTROLLER_ILI9163C
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * 40) #define DISP_BUF_SIZE (TFT_DISPLAY_BUFFER_SIZE_OVERFLOW_PROTECTION)
#elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_PCD8544) #elif defined (CONFIG_LV_TFT_DISPLAY_CONTROLLER_PCD8544)
#define DISP_BUF_SIZE (LV_HOR_RES_MAX * (LV_VER_RES_MAX / 8)) #define DISP_BUF_SIZE (LV_HOR_RES_MAX * (LV_VER_RES_MAX / 8))
#else #else

16
lvgl_i2c/i2c_manager.c
View file

@ -66,8 +66,8 @@ static const uint8_t ACK_CHECK_EN = 1;
#define I2C_MANAGER_0_PULLUPS false #define I2C_MANAGER_0_PULLUPS false
#endif #endif
#define I2C_MANAGER_0_TIMEOUT ( CONFIG_I2C_MANAGER_0_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_0_TIMEOUT ( CONFIG_I2C_MANAGER_0_TIMEOUT / portTICK_DELAY_MS )
#define I2C_MANAGER_0_LOCK_TIMEOUT ( CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_0_LOCK_TIMEOUT ( CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT / portTICK_DELAY_MS )
#endif #endif
@ -79,8 +79,8 @@ static const uint8_t ACK_CHECK_EN = 1;
#define I2C_MANAGER_1_PULLUPS false #define I2C_MANAGER_1_PULLUPS false
#endif #endif
#define I2C_MANAGER_1_TIMEOUT ( CONFIG_I2C_MANAGER_1_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_1_TIMEOUT ( CONFIG_I2C_MANAGER_1_TIMEOUT / portTICK_DELAY_MS )
#define I2C_MANAGER_1_LOCK_TIMEOUT ( CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT / portTICK_RATE_MS ) #define I2C_MANAGER_1_LOCK_TIMEOUT ( CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT / portTICK_DELAY_MS )
#endif #endif
#define ERROR_PORT(port, fail) { \ #define ERROR_PORT(port, fail) { \
@ -244,12 +244,12 @@ esp_err_t I2C_FN(_write)(i2c_port_t port, uint16_t addr, uint32_t reg, const uin
TickType_t timeout = 0; TickType_t timeout = 0;
#if defined (I2C_ZERO) #if defined (I2C_ZERO)
if (port == I2C_NUM_0) { if (port == I2C_NUM_0) {
timeout = (CONFIG_I2C_MANAGER_0_TIMEOUT) / portTICK_RATE_MS; timeout = (CONFIG_I2C_MANAGER_0_TIMEOUT) / portTICK_DELAY_MS;
} }
#endif #endif
#if defined (I2C_ONE) #if defined (I2C_ONE)
if (port == I2C_NUM_1) { if (port == I2C_NUM_1) {
timeout = (CONFIG_I2C_MANAGER_1_TIMEOUT) / portTICK_RATE_MS; timeout = (CONFIG_I2C_MANAGER_1_TIMEOUT) / portTICK_DELAY_MS;
} }
#endif #endif
@ -294,12 +294,12 @@ esp_err_t I2C_FN(_lock)(i2c_port_t port) {
TickType_t timeout; TickType_t timeout;
#if defined (I2C_ZERO) #if defined (I2C_ZERO)
if (port == I2C_NUM_0) { if (port == I2C_NUM_0) {
timeout = (CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT) / portTICK_RATE_MS; timeout = (CONFIG_I2C_MANAGER_0_LOCK_TIMEOUT) / portTICK_DELAY_MS;
} }
#endif #endif
#if defined (I2C_ONE) #if defined (I2C_ONE)
if (port == I2C_NUM_1) { if (port == I2C_NUM_1) {
timeout = (CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT) / portTICK_RATE_MS; timeout = (CONFIG_I2C_MANAGER_1_LOCK_TIMEOUT) / portTICK_DELAY_MS;
} }
#endif #endif

6
lvgl_tft/GC9A01.c
View file

@ -121,9 +121,9 @@ void GC9A01_init(void)
//Reset the display //Reset the display
gpio_set_level(GC9A01_RST, 0); gpio_set_level(GC9A01_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(GC9A01_RST, 1); gpio_set_level(GC9A01_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "Initialization."); ESP_LOGI(TAG, "Initialization.");
@ -134,7 +134,7 @@ void GC9A01_init(void)
GC9A01_send_cmd(GC_init_cmds[cmd].cmd); GC9A01_send_cmd(GC_init_cmds[cmd].cmd);
GC9A01_send_data(GC_init_cmds[cmd].data, GC_init_cmds[cmd].databytes&0x1F); GC9A01_send_data(GC_init_cmds[cmd].data, GC_init_cmds[cmd].databytes&0x1F);
if (GC_init_cmds[cmd].databytes & 0x80) { if (GC_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

8
lvgl_tft/Kconfig
View file

@ -237,6 +237,14 @@ menu "LVGL TFT Display controller"
default 40 if LV_PREDEFINED_DISPLAY_TTGO && (LV_DISPLAY_ORIENTATION_PORTRAIT || LV_DISPLAY_ORIENTATION_PORTRAIT_INVERTED) default 40 if LV_PREDEFINED_DISPLAY_TTGO && (LV_DISPLAY_ORIENTATION_PORTRAIT || LV_DISPLAY_ORIENTATION_PORTRAIT_INVERTED)
default 0 default 0
config LV_HOR_RES_MAX
int "Maximal horizontal resolution to support by the library."
default 480
config LV_VER_RES_MAX
int "Maximal vertical resolution to support by the library."
default 320
# Display colors(?) # Display colors(?)
# Useful to know when the display being used is a monochrome # Useful to know when the display being used is a monochrome

16
lvgl_tft/esp_lcd_backlight.c
View file

@ -11,6 +11,7 @@
#include "driver/gpio.h" #include "driver/gpio.h"
#include "esp_log.h" #include "esp_log.h"
#include "soc/ledc_periph.h" // to invert LEDC output on IDF version < v4.3 #include "soc/ledc_periph.h" // to invert LEDC output on IDF version < v4.3
#include "soc/gpio_sig_map.h"
typedef struct { typedef struct {
bool pwm_control; // true: LEDC is used, false: GPIO is used bool pwm_control; // true: LEDC is used, false: GPIO is used
@ -49,22 +50,37 @@ disp_backlight_h disp_backlight_new(const disp_backlight_config_t *config)
}; };
const ledc_timer_config_t LCD_backlight_timer = { const ledc_timer_config_t LCD_backlight_timer = {
.speed_mode = LEDC_LOW_SPEED_MODE, .speed_mode = LEDC_LOW_SPEED_MODE,
#ifdef ESP_IDF_VERSION_MAJOR >=5
.duty_resolution = LEDC_TIMER_10_BIT,
#else
.bit_num = LEDC_TIMER_10_BIT, .bit_num = LEDC_TIMER_10_BIT,
#endif
.timer_num = config->timer_idx, .timer_num = config->timer_idx,
.freq_hz = 5000, .freq_hz = 5000,
.clk_cfg = LEDC_AUTO_CLK}; .clk_cfg = LEDC_AUTO_CLK};
ESP_ERROR_CHECK(ledc_timer_config(&LCD_backlight_timer)); ESP_ERROR_CHECK(ledc_timer_config(&LCD_backlight_timer));
ESP_ERROR_CHECK(ledc_channel_config(&LCD_backlight_channel)); ESP_ERROR_CHECK(ledc_channel_config(&LCD_backlight_channel));
#ifdef ESP_IDF_VERSION_MAJOR >=5
esp_rom_gpio_connect_out_signal(config->gpio_num, ledc_periph_signal[LEDC_LOW_SPEED_MODE].sig_out0_idx + config->channel_idx, config->output_invert,0);
#else
gpio_matrix_out(config->gpio_num, ledc_periph_signal[LEDC_LOW_SPEED_MODE].sig_out0_idx + config->channel_idx, config->output_invert, 0); gpio_matrix_out(config->gpio_num, ledc_periph_signal[LEDC_LOW_SPEED_MODE].sig_out0_idx + config->channel_idx, config->output_invert, 0);
#endif
} }
else else
{ {
// Configure GPIO for output // Configure GPIO for output
bckl_dev->index = config->gpio_num; bckl_dev->index = config->gpio_num;
#ifdef ESP_IDF_VERSION_MAJOR >=5
esp_rom_gpio_connect_out_signal(config->gpio_num, SIG_GPIO_OUT_IDX, config->output_invert, false);
esp_rom_gpio_pad_select_gpio(config->gpio_num);
ESP_ERROR_CHECK(gpio_set_direction(config->gpio_num, GPIO_MODE_OUTPUT));
#else
gpio_pad_select_gpio(config->gpio_num); gpio_pad_select_gpio(config->gpio_num);
ESP_ERROR_CHECK(gpio_set_direction(config->gpio_num, GPIO_MODE_OUTPUT)); ESP_ERROR_CHECK(gpio_set_direction(config->gpio_num, GPIO_MODE_OUTPUT));
gpio_matrix_out(config->gpio_num, SIG_GPIO_OUT_IDX, config->output_invert, false); gpio_matrix_out(config->gpio_num, SIG_GPIO_OUT_IDX, config->output_invert, false);
#endif
} }
return (disp_backlight_h)bckl_dev; return (disp_backlight_h)bckl_dev;

6
lvgl_tft/hx8357.c
View file

@ -169,9 +169,9 @@ void hx8357_init(void)
//Reset the display //Reset the display
gpio_set_level(HX8357_RST, 0); gpio_set_level(HX8357_RST, 0);
vTaskDelay(10 / portTICK_RATE_MS); vTaskDelay(10 / portTICK_DELAY_MS);
gpio_set_level(HX8357_RST, 1); gpio_set_level(HX8357_RST, 1);
vTaskDelay(120 / portTICK_RATE_MS); vTaskDelay(120 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "Initialization."); ESP_LOGI(TAG, "Initialization.");
@ -192,7 +192,7 @@ void hx8357_init(void)
} }
} }
if (x & 0x80) { // If high bit set... if (x & 0x80) { // If high bit set...
vTaskDelay(numArgs * 5 / portTICK_RATE_MS); // numArgs is actually a delay time (5ms units) vTaskDelay(numArgs * 5 / portTICK_DELAY_MS); // numArgs is actually a delay time (5ms units)
} }
} }

8
lvgl_tft/il3820.c
View file

@ -208,9 +208,9 @@ void il3820_init(void)
/* Harware reset */ /* Harware reset */
gpio_set_level( IL3820_RST_PIN, 0); gpio_set_level( IL3820_RST_PIN, 0);
vTaskDelay(IL3820_RESET_DELAY / portTICK_RATE_MS); vTaskDelay(IL3820_RESET_DELAY / portTICK_DELAY_MS);
gpio_set_level( IL3820_RST_PIN, 1); gpio_set_level( IL3820_RST_PIN, 1);
vTaskDelay(IL3820_RESET_DELAY / portTICK_RATE_MS); vTaskDelay(IL3820_RESET_DELAY / portTICK_DELAY_MS);
#endif #endif
/* Software reset */ /* Software reset */
@ -267,14 +267,14 @@ static void il3820_waitbusy(int wait_ms)
{ {
int i = 0; int i = 0;
vTaskDelay(10 / portTICK_RATE_MS); // 10ms delay vTaskDelay(10 / portTICK_DELAY_MS); // 10ms delay
for(i = 0; i < (wait_ms * 10); i++) { for(i = 0; i < (wait_ms * 10); i++) {
if(gpio_get_level(IL3820_BUSY_PIN) != IL3820_BUSY_LEVEL) { if(gpio_get_level(IL3820_BUSY_PIN) != IL3820_BUSY_LEVEL) {
return; return;
} }
vTaskDelay(10 / portTICK_RATE_MS); vTaskDelay(10 / portTICK_DELAY_MS);
} }
ESP_LOGE( TAG, "busy exceeded %dms", i*10 ); ESP_LOGE( TAG, "busy exceeded %dms", i*10 );

6
lvgl_tft/ili9163c.c
View file

@ -145,9 +145,9 @@ void ili9163c_init(void)
//Reset the display //Reset the display
gpio_set_level(ILI9163C_RST, 0); gpio_set_level(ILI9163C_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ILI9163C_RST, 1); gpio_set_level(ILI9163C_RST, 1);
vTaskDelay(150 / portTICK_RATE_MS); vTaskDelay(150 / portTICK_DELAY_MS);
//Send all the commands //Send all the commands
uint16_t cmd = 0; uint16_t cmd = 0;
@ -157,7 +157,7 @@ void ili9163c_init(void)
ili9163c_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes & 0x1F); ili9163c_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes & 0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) if (ili_init_cmds[cmd].databytes & 0x80)
{ {
vTaskDelay(150 / portTICK_RATE_MS); vTaskDelay(150 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

6
lvgl_tft/ili9341.c
View file

@ -90,9 +90,9 @@ void ili9341_init(void)
//Reset the display //Reset the display
gpio_set_level(ILI9341_RST, 0); gpio_set_level(ILI9341_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ILI9341_RST, 1); gpio_set_level(ILI9341_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "Initialization."); ESP_LOGI(TAG, "Initialization.");
@ -103,7 +103,7 @@ void ili9341_init(void)
ili9341_send_cmd(ili_init_cmds[cmd].cmd); ili9341_send_cmd(ili_init_cmds[cmd].cmd);
ili9341_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F); ili9341_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) { if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

8
lvgl_tft/ili9481.c
View file

@ -83,16 +83,16 @@ void ili9481_init(void)
//Reset the display //Reset the display
gpio_set_level(ILI9481_RST, 0); gpio_set_level(ILI9481_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ILI9481_RST, 1); gpio_set_level(ILI9481_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "ILI9481 initialization."); ESP_LOGI(TAG, "ILI9481 initialization.");
// Exit sleep // Exit sleep
ili9481_send_cmd(0x01); /* Software reset */ ili9481_send_cmd(0x01); /* Software reset */
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
//Send all the commands //Send all the commands
uint16_t cmd = 0; uint16_t cmd = 0;
@ -100,7 +100,7 @@ void ili9481_init(void)
ili9481_send_cmd(ili_init_cmds[cmd].cmd); ili9481_send_cmd(ili_init_cmds[cmd].cmd);
ili9481_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F); ili9481_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) { if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

6
lvgl_tft/ili9486.c
View file

@ -75,9 +75,9 @@ void ili9486_init(void)
//Reset the display //Reset the display
gpio_set_level(ILI9486_RST, 0); gpio_set_level(ILI9486_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ILI9486_RST, 1); gpio_set_level(ILI9486_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "ILI9486 Initialization."); ESP_LOGI(TAG, "ILI9486 Initialization.");
@ -88,7 +88,7 @@ void ili9486_init(void)
ili9486_send_cmd(ili_init_cmds[cmd].cmd); ili9486_send_cmd(ili_init_cmds[cmd].cmd);
ili9486_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F); ili9486_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) { if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

31
lvgl_tft/ili9488.c
View file

@ -52,15 +52,16 @@ static void ili9488_send_color(void * data, uint16_t length);
**********************/ **********************/
// From github.com/jeremyjh/ESP32_TFT_library // From github.com/jeremyjh/ESP32_TFT_library
// From github.com/mvturnho/ILI9488-lvgl-ESP32-WROVER-B // From github.com/mvturnho/ILI9488-lvgl-ESP32-WROVER-B
// From https://github.com/lvgl/lvgl_esp32_drivers/issues/133 -> correction about displaying collors
void ili9488_init(void) void ili9488_init(void)
{ {
lcd_init_cmd_t ili_init_cmds[]={ lcd_init_cmd_t ili_init_cmds[]={
{ILI9488_CMD_SLEEP_OUT, {0x00}, 0x80}, {ILI9488_CMD_SLEEP_OUT, {0x00}, 0x80},
{ILI9488_CMD_POSITIVE_GAMMA_CORRECTION, {0x00, 0x03, 0x09, 0x08, 0x16, 0x0A, 0x3F, 0x78, 0x4C, 0x09, 0x0A, 0x08, 0x16, 0x1A, 0x0F}, 15}, {ILI9488_CMD_POSITIVE_GAMMA_CORRECTION, {0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98, 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00}, 15},
{ILI9488_CMD_NEGATIVE_GAMMA_CORRECTION, {0x00, 0x16, 0x19, 0x03, 0x0F, 0x05, 0x32, 0x45, 0x46, 0x04, 0x0E, 0x0D, 0x35, 0x37, 0x0F}, 15}, {ILI9488_CMD_NEGATIVE_GAMMA_CORRECTION, {0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00}, 15}
{ILI9488_CMD_POWER_CONTROL_1, {0x17, 0x15}, 2}, {ILI9488_CMD_POWER_CONTROL_1, {0x17, 0x15}, 2},
{ILI9488_CMD_POWER_CONTROL_2, {0x41}, 1}, {ILI9488_CMD_POWER_CONTROL_2, {0x41}, 1},
{ILI9488_CMD_VCOM_CONTROL_1, {0x00, 0x12, 0x80}, 3}, {ILI9488_CMD_POWER_CONTROL_NORMAL_3, {0x44}, 1},
{ILI9488_CMD_MEMORY_ACCESS_CONTROL, {(0x20 | 0x08)}, 1}, {ILI9488_CMD_MEMORY_ACCESS_CONTROL, {(0x20 | 0x08)}, 1},
{ILI9488_CMD_COLMOD_PIXEL_FORMAT_SET, {0x66}, 1}, {ILI9488_CMD_COLMOD_PIXEL_FORMAT_SET, {0x66}, 1},
{ILI9488_CMD_INTERFACE_MODE_CONTROL, {0x00}, 1}, {ILI9488_CMD_INTERFACE_MODE_CONTROL, {0x00}, 1},
@ -68,6 +69,7 @@ void ili9488_init(void)
{ILI9488_CMD_DISPLAY_INVERSION_CONTROL, {0x02}, 1}, {ILI9488_CMD_DISPLAY_INVERSION_CONTROL, {0x02}, 1},
{ILI9488_CMD_DISPLAY_FUNCTION_CONTROL, {0x02, 0x02}, 2}, {ILI9488_CMD_DISPLAY_FUNCTION_CONTROL, {0x02, 0x02}, 2},
{ILI9488_CMD_SET_IMAGE_FUNCTION, {0x00}, 1}, {ILI9488_CMD_SET_IMAGE_FUNCTION, {0x00}, 1},
{ILI9488_CMD_DISP_INVERSION_OFF, {0}, 0},
{ILI9488_CMD_WRITE_CTRL_DISPLAY, {0x28}, 1}, {ILI9488_CMD_WRITE_CTRL_DISPLAY, {0x28}, 1},
{ILI9488_CMD_WRITE_DISPLAY_BRIGHTNESS, {0x7F}, 1}, {ILI9488_CMD_WRITE_DISPLAY_BRIGHTNESS, {0x7F}, 1},
{ILI9488_CMD_ADJUST_CONTROL_3, {0xA9, 0x51, 0x2C, 0x02}, 4}, {ILI9488_CMD_ADJUST_CONTROL_3, {0xA9, 0x51, 0x2C, 0x02}, 4},
@ -76,25 +78,33 @@ void ili9488_init(void)
}; };
//Initialize non-SPI GPIOs //Initialize non-SPI GPIOs
gpio_pad_select_gpio(ILI9488_DC); #ifdef ESP_IDF_VERSION_MAJOR >= 5
esp_rom_gpio_pad_select_gpio(ILI9488_DC);
#else
gpio_pad_select_gpio(ILI9488_DC);
#endif
gpio_set_direction(ILI9488_DC, GPIO_MODE_OUTPUT); gpio_set_direction(ILI9488_DC, GPIO_MODE_OUTPUT);
#if ILI9488_USE_RST #if ILI9488_USE_RST
gpio_pad_select_gpio(ILI9488_RST); #ifdef ESP_IDF_VERSION_MAJOR >= 5
esp_rom_gpio_pad_select_gpio(ILI9488_RST);
#else
gpio_pad_select_gpio(ILI9488_RST);
#endif
gpio_set_direction(ILI9488_RST, GPIO_MODE_OUTPUT); gpio_set_direction(ILI9488_RST, GPIO_MODE_OUTPUT);
//Reset the display //Reset the display
gpio_set_level(ILI9488_RST, 0); gpio_set_level(ILI9488_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ILI9488_RST, 1); gpio_set_level(ILI9488_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "ILI9488 initialization."); ESP_LOGI(TAG, "ILI9488 initialization.");
// Exit sleep // Exit sleep
ili9488_send_cmd(0x01); /* Software reset */ ili9488_send_cmd(0x01); /* Software reset */
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
//Send all the commands //Send all the commands
uint16_t cmd = 0; uint16_t cmd = 0;
@ -102,7 +112,7 @@ void ili9488_init(void)
ili9488_send_cmd(ili_init_cmds[cmd].cmd); ili9488_send_cmd(ili_init_cmds[cmd].cmd);
ili9488_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F); ili9488_send_data(ili_init_cmds[cmd].data, ili_init_cmds[cmd].databytes&0x1F);
if (ili_init_cmds[cmd].databytes & 0x80) { if (ili_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }
@ -111,6 +121,7 @@ void ili9488_init(void)
} }
// Flush function based on mvturnho repo // Flush function based on mvturnho repo
// https://github.com/lvgl/lvgl_esp32_drivers/issues/116 -> heap +3 to avoid display artifacts
void ili9488_flush(lv_disp_drv_t * drv, const lv_area_t * area, lv_color_t * color_map) void ili9488_flush(lv_disp_drv_t * drv, const lv_area_t * area, lv_color_t * color_map)
{ {
uint32_t size = lv_area_get_width(area) * lv_area_get_height(area); uint32_t size = lv_area_get_width(area) * lv_area_get_height(area);
@ -118,7 +129,7 @@ void ili9488_flush(lv_disp_drv_t * drv, const lv_area_t * area, lv_color_t * col
lv_color16_t *buffer_16bit = (lv_color16_t *) color_map; lv_color16_t *buffer_16bit = (lv_color16_t *) color_map;
uint8_t *mybuf; uint8_t *mybuf;
do { do {
mybuf = (uint8_t *) heap_caps_malloc(3 * size * sizeof(uint8_t), MALLOC_CAP_DMA); mybuf = (uint8_t *) heap_caps_malloc(3 * size * sizeof(uint8_t) + 3, MALLOC_CAP_DMA);
if (mybuf == NULL) ESP_LOGW(TAG, "Could not allocate enough DMA memory!"); if (mybuf == NULL) ESP_LOGW(TAG, "Could not allocate enough DMA memory!");
} while (mybuf == NULL); } while (mybuf == NULL);

2
lvgl_tft/ili9488.h
View file

@ -27,7 +27,7 @@ extern "C" {
*********************/ *********************/
#define ILI9488_DC CONFIG_LV_DISP_PIN_DC #define ILI9488_DC CONFIG_LV_DISP_PIN_DC
#define ILI9488_RST CONFIG_LV_DISP_PIN_RST #define ILI9488_RST CONFIG_LV_DISP_PIN_RST
#define ILI9488_USE_RST CONFIG_LV_DISP_USE_RSTS #define ILI9488_USE_RST CONFIG_LV_DISP_USE_RST
/******************* /*******************
* ILI9488 REGS * ILI9488 REGS

4
lvgl_tft/pcd8544.c
View file

@ -64,9 +64,9 @@ void pcd8544_init(void){
// Reset the display // Reset the display
gpio_set_level(PCD8544_RST, 0); gpio_set_level(PCD8544_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(PCD8544_RST, 1); gpio_set_level(PCD8544_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
pcd8544_send_cmd(0x21); /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */ pcd8544_send_cmd(0x21); /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
pcd8544_send_cmd(0x06); /* temp. control: b10 = 2 */ pcd8544_send_cmd(0x06); /* temp. control: b10 = 2 */

12
lvgl_tft/ra8875.c
View file

@ -156,9 +156,9 @@ void ra8875_init(void)
// Reset the RA8875 // Reset the RA8875
gpio_set_level(RA8875_RST, 0); gpio_set_level(RA8875_RST, 0);
vTaskDelay(DIV_ROUND_UP(100, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(100, portTICK_DELAY_MS));
gpio_set_level(RA8875_RST, 1); gpio_set_level(RA8875_RST, 1);
vTaskDelay(DIV_ROUND_UP(100, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(100, portTICK_DELAY_MS));
#endif #endif
// Initalize RA8875 clocks (SPI must be decelerated before initializing clocks) // Initalize RA8875 clocks (SPI must be decelerated before initializing clocks)
@ -251,21 +251,21 @@ void ra8875_sleep_in(void)
ra8875_configure_clocks(false); ra8875_configure_clocks(false);
ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_DELAY_MS));
ra8875_write_cmd(RA8875_REG_PWRR, 0x02); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x02); // Power and Display Control Register (PWRR)
} }
void ra8875_sleep_out(void) void ra8875_sleep_out(void)
{ {
ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x00); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_DELAY_MS));
ra8875_configure_clocks(true); ra8875_configure_clocks(true);
disp_spi_change_device_speed(-1); disp_spi_change_device_speed(-1);
ra8875_write_cmd(RA8875_REG_PWRR, 0x80); // Power and Display Control Register (PWRR) ra8875_write_cmd(RA8875_REG_PWRR, 0x80); // Power and Display Control Register (PWRR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_DELAY_MS));
} }
uint8_t ra8875_read_cmd(uint8_t cmd) uint8_t ra8875_read_cmd(uint8_t cmd)
@ -298,7 +298,7 @@ void ra8875_configure_clocks(bool high_speed)
vTaskDelay(1); vTaskDelay(1);
ra8875_write_cmd(RA8875_REG_PCSR, PCSR_VAL); // Pixel Clock Setting Register (PCSR) ra8875_write_cmd(RA8875_REG_PCSR, PCSR_VAL); // Pixel Clock Setting Register (PCSR)
vTaskDelay(DIV_ROUND_UP(20, portTICK_RATE_MS)); vTaskDelay(DIV_ROUND_UP(20, portTICK_DELAY_MS));
} }
static void ra8875_set_window(unsigned int xs, unsigned int xe, unsigned int ys, unsigned int ye) static void ra8875_set_window(unsigned int xs, unsigned int xe, unsigned int ys, unsigned int ye)

6
lvgl_tft/sh1107.c
View file

@ -101,9 +101,9 @@ void sh1107_init(void)
//Reset the display //Reset the display
gpio_set_level(SH1107_RST, 0); gpio_set_level(SH1107_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(SH1107_RST, 1); gpio_set_level(SH1107_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
//Send all the commands //Send all the commands
@ -112,7 +112,7 @@ void sh1107_init(void)
sh1107_send_cmd(init_cmds[cmd].cmd); sh1107_send_cmd(init_cmds[cmd].cmd);
sh1107_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F); sh1107_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F);
if (init_cmds[cmd].databytes & 0x80) { if (init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

6
lvgl_tft/st7735s.c
View file

@ -107,9 +107,9 @@ void st7735s_init(void)
//Reset the display //Reset the display
gpio_set_level(ST7735S_RST, 0); gpio_set_level(ST7735S_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ST7735S_RST, 1); gpio_set_level(ST7735S_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "ST7735S initialization."); ESP_LOGI(TAG, "ST7735S initialization.");
@ -120,7 +120,7 @@ void st7735s_init(void)
st7735s_send_cmd(init_cmds[cmd].cmd); st7735s_send_cmd(init_cmds[cmd].cmd);
st7735s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F); st7735s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes&0x1F);
if (init_cmds[cmd].databytes & 0x80) { if (init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

6
lvgl_tft/st7789.c
View file

@ -97,9 +97,9 @@ void st7789_init(void)
//Reset the display //Reset the display
#if !defined(ST7789_SOFT_RST) #if !defined(ST7789_SOFT_RST)
gpio_set_level(ST7789_RST, 0); gpio_set_level(ST7789_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ST7789_RST, 1); gpio_set_level(ST7789_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#else #else
st7789_send_cmd(ST7789_SWRESET); st7789_send_cmd(ST7789_SWRESET);
#endif #endif
@ -112,7 +112,7 @@ void st7789_init(void)
st7789_send_cmd(st7789_init_cmds[cmd].cmd); st7789_send_cmd(st7789_init_cmds[cmd].cmd);
st7789_send_data(st7789_init_cmds[cmd].data, st7789_init_cmds[cmd].databytes&0x1F); st7789_send_data(st7789_init_cmds[cmd].data, st7789_init_cmds[cmd].databytes&0x1F);
if (st7789_init_cmds[cmd].databytes & 0x80) { if (st7789_init_cmds[cmd].databytes & 0x80) {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

6
lvgl_tft/st7796s.c
View file

@ -91,9 +91,9 @@ void st7796s_init(void)
//Reset the display //Reset the display
gpio_set_level(ST7796S_RST, 0); gpio_set_level(ST7796S_RST, 0);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
gpio_set_level(ST7796S_RST, 1); gpio_set_level(ST7796S_RST, 1);
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
#endif #endif
ESP_LOGI(TAG, "Initialization."); ESP_LOGI(TAG, "Initialization.");
@ -106,7 +106,7 @@ void st7796s_init(void)
st7796s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes & 0x1F); st7796s_send_data(init_cmds[cmd].data, init_cmds[cmd].databytes & 0x1F);
if (init_cmds[cmd].databytes & 0x80) if (init_cmds[cmd].databytes & 0x80)
{ {
vTaskDelay(100 / portTICK_RATE_MS); vTaskDelay(100 / portTICK_DELAY_MS);
} }
cmd++; cmd++;
} }

2
lvgl_touch/stmpe610.c
View file

@ -63,7 +63,7 @@ void stmpe610_init(void)
// Attempt a software reset // Attempt a software reset
write_8bit_reg(STMPE_SYS_CTRL1, STMPE_SYS_CTRL1_RESET); write_8bit_reg(STMPE_SYS_CTRL1, STMPE_SYS_CTRL1_RESET);
vTaskDelay(10 / portTICK_RATE_MS); vTaskDelay(10 / portTICK_DELAY_MS);
// Reset the SPI configuration, making sure auto-increment is set // Reset the SPI configuration, making sure auto-increment is set
u8 = read_8bit_reg(STMPE_SPI_CFG); u8 = read_8bit_reg(STMPE_SPI_CFG);

2
lvgl_touch/tp_spi.c
View file

@ -59,7 +59,7 @@ void tp_spi_add_device(spi_host_device_t host)
.command_bits = 8, .command_bits = 8,
.address_bits = 0, .address_bits = 0,
.dummy_bits = 0, .dummy_bits = 0,
.flags = SPI_DEVICE_HALFDUPLEX | SPI_DEVICE_NO_DUMMY, .flags = SPI_DEVICE_NO_DUMMY,
}; };
//Attach the Touch controller to the SPI bus //Attach the Touch controller to the SPI bus